HRL Laboratories is developing a quantum computing platform that uses electrons trapped in a thin silicon layer to form qubits. To trap individual electrons in potential wells, voltages are applied to gate electrodes on the surface of the structure and manipulated by appropriate pulses applied to the electrodes. These potential wells are susceptible to noise from outside voltage sources. To address this issue, we developed a COMSOL model to assess whether a ferroelectric material could reduce the voltage needed to trap and manipulate the electrons.